Minimizing total wire length during 1-dimensional compaction
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چکیده
منابع مشابه
Minimizing total wire length during 1-dimensional compaction
Minimizing the total wire length is an important objective in VLSI layout design. In this paper we consider the problem of minimizing the total wire length during I-dimensional (I-D) compaction. Assume we are given a layout. containing nh horizontal wires, nlJ vertical wires, and rectilinear polygonal layout. components c.omposed of 7lr vertical edges. We present an O(n/, ·nlogn) time algorithm...
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ژورنال
عنوان ژورنال: Integration
سال: 1992
ISSN: 0167-9260
DOI: 10.1016/0167-9260(92)90023-r